[Nlnog] Cisco?

Boudewijn Visser bvisser-nlnog at xs4all.nl
Mon Sep 8 18:29:03 UTC 2003

> On Mon 08 Sep 2003 (17:38 +0200), Boudewijn Visser wrote:
>> > On Mon, 8 Sep 2003, MarcoH wrote:
>> >
>> >> Tuurlijk, maar volgens mij doet die asic van juniper gewoon voor
>> iedere
>> >> packet een lookup en zet hij geen flows op...
>> >
>> > In die veronderstelling was (en ben) ik ook. M'n reply was misschien
>> een
>> > beetje vaag, maar waar het me om ging was dat het in ieder geval in
>> > hardware gebeurt, of het nu wel of niet flow based is. Flow based
>> > forwarding is eigenlijk ook alleen maar een lapmiddel voor dozen die
>> > geen route lookups in hardware kunnen. Als je lookups in hardware
>> doet,
>> > is het bijhouden van flows volgens mij niet zo zinvol.
>> >
>> Hardware of software heeft er niks mee te maken.
>> De grote vraag is of er een gecached fast-path is,en een tragere
>> situatie
>> bij een cache miss, dan wel of de volledige forwarding table in 'cache'
>> (cq een efficiente [qua lookup snelheid] datastructuur) staat.
>> Of die forwarding lookup daarna door een min of meer general purpose
>> processor dan wel een special purpose processor (aka 'asic') gedaan
>> wordt
>> maakt het verschil niet.
> I beg to differ - general purpose processors don't have content
> addressable memory (they may in their page mapping hardware, but not
> for general purpose operations). Asics/dedicated routeing processors
> can use content addressable memory which cab be used to reduce lookup
> time dramatically.

While I agree that special purpose hardware can (and should, what's the
point otherwise) do things faster than most general purpose hw, my main
point is and remains that a fast solution for cached data and a slower
path for other/first time access is the culprit for the L3 switch

Actually, I am about 99% sure that those Extreme switches DO use asics+cam
for packet forwarding, and the whole problem is that not every destination
fits in that memory. Hence the caching solution, and the problem when
traffic keeps thrashing the cache.

For contrast, see (for example) Cisco routers with CEF enabled. Most of
cisco's routers, and certainly all lower end, do not have special purpose
With CEF however, they DO have a fixed forwarding performance, indepedent
of previous packets' destinations.
(And certainly a lot faster than the rumored worst cases for some of the
L3 switches. Wasn't it about 5kpps on that riverstone thingy worst case ? )

My H&P comp.arch books don't cover CAM, but some googling suggests that
there are no routers yet based on a full internet forwarding table in CAM.
No lack of research proposals, though.
I guess that it must be hard (or *very* expensive) to build the large CAMS

>From what I can find, Juniper also does not use CAM for storing forwarding
tables, but normal DRAM and SRAM.
Most switch vendors seem to use CAM indeed, but of a fairly small size.


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